Finance & High-frequency trading
Sub-microsecond encryption between trading floors
FPGA runs line-rate encryption, CPU orchestrates FIX/ITCH sessions, GPU accelerates real-time risk management.
FPGA
Line-rate encryption + dual-partition trading
Workloads
- ▸ AES-256-GCM 800 Gbps
- ▸ FIX/ITCH/OUCH feed handler
- ▸ Matching engine partition
Performance
< 1 µs crypto latency
CPU
Session orchestration + persistence
Workloads
- ▸ SWIFT/FIX session management
- ▸ Journalized DORA audit
- ▸ Prometheus supervision
Performance
20 k concurrent sessions
GPU
Risk management + analytics
Workloads
- ▸ Real-time Value-at-Risk
- ▸ Derivatives Monte-Carlo
- ▸ ML fraud detection
Performance
500 k pricings / s
Multi-agent scenario
An encrypted order arrives: the FPGA decrypts with zero CPU interaction, triggers the matching engine, returns the encrypted ack. CPU journalizes for DORA. GPU recomputes portfolio VaR on each trade.