Nuclear OIV
Cryptographic isolation + SIIV
FPGA isolates process buses, CPU handles SIL3/4 DCS, GPU monitors intrusion signatures.
FPGA
Process bus isolation
Workloads
- ▸ Crypto data diode
- ▸ Encrypted IEC 61850
- ▸ Logical air-gap
Performance
No return traffic
CPU
DCS + SIIV journalization
Workloads
- ▸ IEC 61513 class 1E DCS
- ▸ Sealed SIIV journal
- ▸ 2oo3 redundancy
Performance
99.9999 % availability
GPU
Anomaly detection
Workloads
- ▸ IEC 62645 intrusion signatures
- ▸ Process traffic baseline
- ▸ SOC correlation
Performance
Alert < 30 s
Multi-agent scenario
An intrusion attempt is detected: FPGA blocks all return traffic at line-rate, CPU generates a sealed SIIV journal, GPU correlates with IEC 62645 signatures and alerts ANSSI in <30 s.